If I were to check this OU device I would try first to make a concept device working at 50 or 60Hz. It looks very similiar to various patents.
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Magnetic Implosion Transformer Replication
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personal use of patent
Originally posted by Spokane1 View PostGenerally, people can build from any US patent any invention they want for their own use. It is when they sell those items that the patent protection kicks in.
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35 U.S.C. 271 Infringement of patent.
35 U.S.C. 271 Infringement of patent. - Patent Laws
35 U.S.C. 271 Infringement of patent.
(a) Except as otherwise provided in this title, whoever without authority makes, uses, offers to sell, or sells any patented invention, within the United States, or imports into the United States any patented invention during the term of the patent therefor, infringes the patent.
(b) Whoever actively induces infringement of a patent shall be liable as an infringer.
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Nauseating but true. You must have permission from the assignee(s) of the patent who may not necessarily be the inventor.
But like I said, it is completely impractical for any individual or business to sue an individual for replicating their patent for personal use or for scientific inquiry, etc... and how would they know?
This sums it up nicely between the US and elsewhere:
Commercial and noncommercial use
In most European countries, the exclusive exploitation rights granted by a patent are restricted to commercial exploitation. A private person who builds the patented invention in his own home for his own personal goals cannot infringe on a patent. The reasoning behind this is that such a situation cannot harm the patent holder.
US law is more strict. It forbids anyone from making, using or selling the invention, even when the use is strictly personal. Of course, since patent infringement lawsuits are very expensive, a private person is rarely if ever prosecuted for using the invention in his own home. Such a situation could occur when a private person offers on his website a piece of software that uses someone else's patented technology. The patent holder may feel that the freely available software threatens his commercial product, and then decide to use the patent to prevent the distribution of the free product.Sincerely,
Aaron Murakami
Books & Videos https://emediapress.com
Conference http://energyscienceconference.com
RPX & MWO http://vril.io
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Block Diagram
Fellow Builders,
Here is a Version 1 Block Diagram we can use for discussion and improvement.
Enjoy!
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Logic Board
Dear Builder,
Here is a first cut of dissecting the system's logic. I shall draft up an actual schematic at work. This may take a couple of weeks. Stay tuned.
Spokane1Attached Files
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Let the Junk Box Replication Experiments Begin!Attached Files
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Gunderson Logic Wiring Diagrams
Dear Builders and Measurement Specialists,
Here is my first pass at wiring diagrams for the Graham Gunderson Logic controller. There are two versions. One is the way things appeared to be wired during the presentation. The other is the way the system was connected a week after the convention in Graham's shop. In that version he has disabled some of the chips and appears to have attached one or two pulse generators to possibly sweep input signals.
There is a fair amount of detail in these drawings. I have included pdf versions so you can study the small text. The resistors came in pretty good, but I couldn't see what the values were for the capacitors or the trim pots.
The next step is to develop a logic diagram so that we can figure out what is happening.
Spokane1
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Logic Diagram
Dear Builders,
This is the system logic controller diagram to date.
Enjoy!
Spokane1
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Logic Circuit
Dear All,
Here is another implementation (Bare Bones) of a Logic controller for the Gunderson Device. This one uses 100K trim pots and 1nF timing capacitors. It also gives a wide range of control over the timing parameters. I used 74LS123 and a 7414 (obsolete). The newer HC CMOS versions should give even better performance and can run at a higher voltage. This arrangement appears to have no starting problems.
What is missing are the trim pot saver resistors (typically 200 Ohm), more bypass capacitors, the push button switches that Graham used (for testing?) and the extra wiring shields around the ends of the IC's (see Graham's photo to see how this was done). I don't know if any of this extra stuff is needed since the fast transition times are controlled by the Power MOSFET drivers.
It appears to me that all of the timing parameters in this sub-circuit are manually controlled. I thought there would be some logic derived control signals, but apparently not.
Many thanks to TinselKoala and k4zep for the development of this circuit.
Up next. The development of an LTSpice VII simulation to see how those timing pulses control the H-Bridge to generate that discontinuous 2/3's sine wave excitation input.
Spokane1
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Simulation
Here is my perception of how the circuit is wired and one possible implementation of an attempted simulation. I've only been into this a few hours. Also attached are some response traces to single and double current pulses.
Spokane1
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A comment from member Partzman at OU.com
here is a comment from member Partzman [reposted with permission]
from here
Graham Gunderson's Energy conference presentation Most impressive and mysterious
Partzman
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I have finished watching Graham's MIT video and IMO, he really does give enough info to replicate.
Several points of note, when the input current as shown on CH2 (blue) reaches the negative peak, the primary core is saturated. At the flat top portion of the waveform, the primary core is at a higher permeability. The core bias is set of course by the PMs.
During the negative half cycle of the input voltage on CH1, the first pair of opposite H bridge switches are on and during the positive half cycle the second switch pair are used which is already known. However, during the remaining part of the input cycle when the core is in a high perm state, the second pair is left on and conduction is thru primarily the mosfet reverse conduction.
The synchronous mosfet switching uses both normal and reverse conduction and may have already been pointed out but not that I recall. While current is flowing thru the mosfet in the normal mode that is, when conventional current flow is from drain to source, the gate is switched off for a short period producing a large positive going voltage spike on the secondary. Also during this time, the secondary current and flux reverses
direction as is seen in the green channel and when the peak reverse is reached, gate voltage is again applied to the mosfet which now conducts in the reverse conduction mode that is, from source to drain with very low resistance. This action is what results in the output caps being charged negatively as shown. Graham also stated that the output current phasing is 180' from that shown.
Regarding the issue of the current connections on the input Clark/Hess power analyzer, he removed the original connections well after he had explained the operation of the device and all the input/output measurements. He made the change during a time he was explaining another aspect of the device.
The secondary core half is operated in a mostly linear mode while the primary core half is operating around the saturation knee. This seems to be a key prerequisite in the appropriate flux flows (or magnetic vector potential) along with the proper output synchronous timing.
I can now understand how a small capacitance added to the gates of the output synchronous mosfets could destroy the OU effect
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respectfully
Chet KLast edited by RAMSET; 08-04-2016, 08:11 PM.If you want to Change the world
BE that change !!
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Implosion Transformer
Implosion Transformer - Graham Gunderson:
Hello Mark.
Thankyou all for your attempts to amplify what Graham presented at the Conference.
His talk was enlightening to say the least as I suspect that what he was doing is along a similar line to the 1966 RCA Colour TV transformer implosion that Steven Marks referred to.
The CTC-5 power supply using two 5UGs ('in case one failed') which I have also built and what I suspect as being the cause of the sustained Implosion due to the transformer being utilised with the two rectifiers with one side coming unbalanced with Gaham's system being controlled and the Implosion only of a brief but effective nature.
This is the simple reason that if you use two unmatched transformers, side by side with equal voltages that one will run amok with a possible explosion/implosion resulting from an unbalance situation.
This is where my 'Spherics Tetrahedral Device' (STD) is coming from along similar lines but with a rotating vortex magnetic field and also using time delays.
Think this is a much cleaner concept than Grahams and is more able to be replicated without the complex solid state controllers.
The 'Impulse Discharge' device also appears to be an easier candidate for others to build.
My opinion only which still requires a solid confirmation on two fronts.
I did not see anything about Edwin Sweet's Barium Magnet preparation as I also have his device here which is on the list for review as I see an error in my previous approach.
I did not see any hope of this being able to be connected to provide a useable power as the device is very much in its infancy.
Why is Graham using Mosfets when he can use Vacuum Tubes which have a much more positive switching capability than any solid state device?
Noticed his switching glitch in the yellow trace where he could be using dual direction thyratrons without any protection diodes that really kill any speed.
Error in his statement that square waves utilise even harmonics, should be the odd harmonics only as the second etc are not present because of the duty cycle.
4. Square Wave Harmonics
More information would be needed on the transformer used and its specific qualities.
I can see why Eric Dollard did not want to be present at the Final countdown.
I commend Eric for his TEM/LMD demonstration as it has helped me considerably with the STD organisation.
Smokey
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Gunderson System Schematic
Dear All,
Here is a system schematic to date.
Spokane1
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Synchronous Diode Component Layout
Spokane1
Dear All,
Here is a drawing of the Synchronous Diode Component Layout to help facilitate discussions about this sub assembly.
Enjoy!
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