TTL, CMOS & such like

[rave154]

hi folks,

i thought id put this in a seperate thread, as the answer may be helpful not just to what im going to apply it to, but also lots of other things that beginners ( like myself ) and semi beginners may find useful.

MY question,

i have a SN74LS175N chip here, a quad flip flop,

based on the following pdf datasheet,

http://www.datasheetcatalog.org/data...g216t704py.pdf

Q-1:- it would appear that this is a TTL Chip?

Q-2:- if this is so, then i notice that the supply voltage is from 4.5V to 5.5V....no problem, can just use a few AAA batts in series...

my main question is... regarding the CLOCK input which i am going to feed from my signal generator, in previous things ive used my Sig gen for...ive used the 50 Ohm socket on the SG... but.....now should i plug the lead into the socket marked TTL? and have this now as the input to the CLOCK input on the chip?

Thanks in advance

David. D

[rave154]

gyulasun.......heeeeeeeeeeeelp

[gyula]

Hi David,

Q1: yes, it is a much speeder version of the 74175 but still TTL IC, the power consumption is 1/3 of the 74175

Q2: Yes 3 AAA brand new batteries are fine, they have 1.6V each, unloaded and 4.7-4.8V is already good for this IC

Well I think if you have a dedicated TTL output on your FG then it could drive the IC clock input directly. You may check the user manual to be sure? maybe you catch it on the web if you do not happen to have it.

rgds, Gyula

[SeaMonkey]

Hi David,


Well I think if you have a dedicated TTL output on your FG then it could drive the IC clock input directly. You may check the user manual to be sure? maybe you catch it on the web if you do not happen to have it.

rgds, Gyula

When providing an input to a TTL family chip
it is important that the "signal" be no more
than 5 Volts positive in amplitude to avoid
erratic operation or potential damage to the
chip.

The "signal" must also have no negative polarity
associated with it - the most "negative" portion
if the signal should be 0 Volts.

There is a range of voltage at the input of the
TTL circuit which will qualify as a Logic 0 and
another range of voltage which will qualify as
a Logic 1. Most TTL Data Sheets define what
the acceptable voltage levels are.

The LS family of TTL is "Low Power Schottky"
or non-saturating switching which is very fast.

Non-saturating means that the Logic 0 output
will be a very low positive voltage somewhat above
0 Volts, but still acceptable. (0.8 Volts or less)

[rave154]

Thanks for the answers fella's, making a bit of sense to me now.

i put my MM on the TTL output..it puts out 1.85V no matter what i do to the amplitude setting so it seems like its what you say it is

One last question, gyulasun you told me when using CMOS Chips to connect any unused inputs to either ground or VCC which i did.....do i have to do the same with TTL chips or can i leave unused inputs "open" ?

[gyula]

One last question, gyulasun you told me when using CMOS Chips to connect any unused inputs to either ground or VCC which i did.....do i have to do the same with TTL chips or can i leave unused inputs "open" ?

You can leave unused pins of a TTL IC 'open' if they are not needed for you. Do not connect them to anywhere.

[rave154]

Thanks Gyulasun,

got it working nicely with your help using the TTL output of the function generator & leaving the unused inputs of the chip 'open' ( I also left the CLEAR pin open too )