This is it !

[gmeast]

progress

I love it Greg, it's exactly what we need. Positive here or there adjustment and inbetween. Pure genius. I don't know what else to say it's perfect !

To tell you the truth if it works the same as the same sequence would with a micro it is much better. Would the power consumption be less too ? Not that it will matter.

Looking back now I am very happy we took it slow and were so methodical about our progress, it seems to be the only way. You should be very proud of your efforts Greg.

Excelent work.

Thanks Farmhand,

It's satisfying to set your sights on a goal and actually see light at the end of the tunnel. Also to have not deviated much from the plan. Why I did not see this sooner, I have no idea. I do believe Bob Boyce's brief participation and 'clue dropping' verified what we had both suspected ... we must 'swirl'. Also, he confirmed (indirectly) what to tune for ... and you have seen part of it in your recent scope shots. What remains is to get several of them 'colliding' in a toroid to produce non-Hertzian waves (that opens the floodgates for longitudinal energy flow) ... plus I still need to know more about sizing that damned, pesky choke at the final output ... that's starting to bother me.

Now, as for power: I just metered it and it's at 81mA. Don't panic ... 23mA of that is the Op-Amp PWM running as the clock. The LTC6900 clock consumes a typical 500uA!. Add also 15mA for pull-down resistors on the dip switches ... that can go to about 2mA with the proper digital signal buffer. Add also that there are 6 times the number of chips being powered as there will be in the real thing. It's sucking up only a 'real' 81 - 23 - 12 = 46mA, and again that's with more chips powered than there will be. So even THAT part of it is projecting out well.

Thanks Farmhand,

Later

[gmeast]

ordered stuff

I got an advance and ordered the DSO Quad, the clock chip we've been talking about, some MOSFETS, and some of the MOSFET drivers, both inverting and non-inverting. They should be here by the end of the week. I'm excited!!

Hi 7imix,

That's very exciting I must say. We need lots of parts being tested, especially at the power-end now ... which includes drivers of all sorts as well as the MOSFETS.

I think we will have a useful multi-phase controller to signal the gate drivers.

This design challenge has been very rewarding. It's all coming together guys!

Later

[Farmhand]

Parts List

Hi Greg, I was wondering if you could make up a list a bit more specific and PM it to me. I'll be going to town for some parts in three days time. It's ok if everything is not on it. I just want to get together some of the things I will definately need.

I think I have worked out that some of the componants from one supplier I use are dodgey. I have some MC14001BCP Chips that work fine but I also have some HEF4001BP from a different supplier and they dont seem to work. An awfull lot of current flows through the HEF one's, over 100ma current draw(thats just the chip) when put into the same circuit that works fine with the good chips the MC1's they use 15Ma . I'm peeved I can't see that there should be a difference between them. I thought it was a problem with the HEF4011's but the HEF4001's are the same. The HEF's must be all bodgey.

This is what annoys me if I buy 4001 chips from two different places they should work the same or at least similar.

7imix what are the actual numbers on the chips you use in your 4001 circuit ?

Cheers

[gmeast]

components

Hi Greg, I was wondering if you could make up a list a bit more specific and PM it to me. I'll be going to town for some parts in three days time. It's ok if everything is not on it. I just want to get together some of the things I will definately need.

I think I have worked out that some of the componants from one supplier I use are dodgey. .................................................. .................................................. .................................................. ............................................
Cheers

Hi Farmhand,

The largest difference in allot of this stuff sit with the power and speed specifications. Earlier versions of many IC's use more power and are slower, OR there is simply a FAST version that has been spec'd into a product but has huge power consumption.

An example is a comparator I might use. Its the "85". it's available like this:
Aside from the package (suffix I won't include):

SN7485xx 23 nsec time delay & consumes 275 mW
SN74LS85xx 24 nsec time delay & consumes 52 mW
SN74S85xx 11 nsec time delay & consumes 365 mW

This is an example. I've tried to make sure I use the same spec'd chip 'family' if they are all working together. I suppose if things are cascaded, then you might want to pay close attention to the time delays. But power is very important too because if the circuit uses power greater than the self charge effect, it's a failure then. It's this last point that may ultimately decide in favor of a microprocessor.

Anyway, I have to find a dip switch digital interface chip to add to the list. Pull-up and pull-down resistors can gobble up allot of power, so this needs addressing to eliminate them. Anyone give a suggestion ... it would be appreciated.

This thread has 22,232 as of right now, but I see very few members online listed below. I guess most members are watching as 'guests' ... sneaky, sneaky.

I need a list for me too. Only our latch-reset logic requires gate chips. NOR, NOT & AND and they are SN74ls02, SN74LS04 and SN74LS08, respectively ... mid-speed, mid-power (but still low).

Later

[7imix]

I need a list for me too. Only our latch-reset logic requires gate chips. NOR, NOT & AND and they are SN74ls02, SN74LS04 and SN74LS08, respectively ... mid-speed, mid-power (but still low).

Later

it would be possible to redo the logic with all NAND gates. The way I originally did the logic, I just did it the most straightforward way possible.

The flip flops can be implemented using NAND instead of NOR, inverters can be constructed by shorting the NAND inputs together, and the AND gates can be a NAND with an inverter after it. I'll rework the circuit, it would be nice to have fewer components.

[gmeast]

fewer components - good

it would be possible to redo the logic with all NAND gates. The way I originally did the logic, I just did it the most straightforward way possible.

The flip flops can be implemented using NAND instead of NOR, inverters can be constructed by shorting the NAND inputs together, and the AND gates can be a NAND with an inverter after it. I'll rework the circuit, it would be nice to have fewer components.

Hi 7imix,

That sound good. But first let me send you exactly the way it's now hooked up. Get your PM.

Later

[Farmhand]

Hey Guys, I hate to be so annoying but I found the difference in the 4001/4011 chips I need clarifying. In the drawing below the part in red says for the 4001 ( j=A+B) but for the 4011 it says ( j=A dot B) What does the A+B mean as compared to the A dot B. I know j are the outputs from each gate.

And I know the inputs are A and B on the left, the first two rows of transistors from the left are different aswell. Those two rows are reversed from each other as to the respective chips.

http://9xhe3g.bay.livefilestore.com/...ata.jpg?psid=1

So I guess my question is if the input pins A, B on each chip are shorted how would the output "j" differ between them ?

Would the output of the 4011 gate be equal only to A or B while the ouput of the 4001 gate would be equal to A + B ?

Sorry for all the questions, but you guys left me completely behind so I thought I would try to understand this properly, it might help me in the long run.

Oh one more question should I be using an input resister to the power pin of these chips when I use them from a 12 volt battery ?

Oh yeah I whipped up a quick inverter oscillator with a 4047 chip and it worked first go no probs. It can go 40 Khz plus, haven't tested that out yet.
But is quite precise. 50/50 though, I'm going to try to use it to pulse the solar panel power from two big cap banks at 17.5 volts to big batteries.

Here's the inverter drawing, i'm using IRF46N power mosfets.
http://public.bay.livefilestore.com/...ter.bmp?psid=1

I'm going to try some choke's soon with three at 100 Khz see what might work. I have a couple of filters to play with. If I find anything interesting about the choke i'll let you know.

I can understand a little bit about your setup Greg but I can't keep up with you guys, yet. It's ok though, I hope.

Hopefully if I keep playing around with this other stuff and studying I will pick it up at my own pace.

Cheers

[7imix]

Did you see my big logic gate post?

http://www.energeticforum.com/129380-post1079.html

If the inputs of the NAND and the NOR gates are shorted, they should give the same outputs.

I used the symbols & and | coming from a computer science background. The symbols + and dot mean the same thing, they are just from traditional Boolean algebra. The line over the A + B and over the A dot B means NOT.

If the inputs are shorted, both inputs will be either 0 (0 volts) or 1 (5 volts, or whatever vcc is being used).

NAND and NOR gates are the same as AND and OR but with a NOT (an inverter) after the AND or OR.

So:

0 AND 0 = 0, inverted = 1
1 AND 1 = 1, inverted = 0

0 OR 0 = 0, inverted = 1
1 OR 1 = 1, inverted = 0

Test it out with a voltmeter or scope. Short the inputs of a gate together, then ground the inputs and measure the voltage of the output. It should be 5 volts (or whatever vcc you are running into the chip)

Then connect the inputs to vcc and measure the voltage of the output. It should be 0 volts.

Sometimes on those chips they shuffle around which pins are inputs and which are outputs. Use the technique above on all the gates on the chip to see if the pins you expect to be inputs and outputs actually are.

Finally for these logic gates they usually recommend grounding unused inputs or outputs or both. Make sure you are doing that.

I'm happy to help you try to figure this out, it's good practice.

[7imix]

I looked at the datasheet

http://www.energies.alba-annuaire.fr/data/cd/CD4001.pdf

If the inputs are shorted, the chips should be completely interchangeable.

Note the "connection diagrams" section. The first gate's inputs are pin 1 and 2 and it's output is 3, but the second gate's inputs are pins 5 and 6 and the output is pin 4. It's similar for the other side.

Manually testing each gate like I described in my last post will tell you whether the chips are fried or not.

[Farmhand]

Ok 7mix, thank you very much, this post and the other one from before make sense now. I'll test the one's I have used and think might be busted and see what happens. Should be easy to test now I know what to expect.

I allready have an idea or two from this new knowledge.

Did you see my big logic gate post?

http://www.energeticforum.com/129380-post1079.html

If the inputs of the NAND and the NOR gates are shorted, they should give the same outputs.

I used the symbols & and | coming from a computer science background. The symbols + and dot mean the same thing, they are just from traditional Boolean algebra. The line over the A + B and over the A dot B means NOT.

If the inputs are shorted, both inputs will be either 0 (0 volts) or 1 (5 volts, or whatever vcc is being used).

NAND and NOR gates are the same as AND and OR but with a NOT (an inverter) after the AND or OR.

So:

0 AND 0 = 0, inverted = 1
1 AND 1 = 1, inverted = 0

0 OR 0 = 0, inverted = 1
1 OR 1 = 1, inverted = 0

Test it out with a voltmeter or scope. Short the inputs of a gate together, then ground the inputs and measure the voltage of the output. It should be 5 volts (or whatever vcc you are running into the chip)

Then connect the inputs to vcc and measure the voltage of the output. It should be 0 volts.

Sometimes on those chips they shuffle around which pins are inputs and which are outputs. Use the technique above on all the gates on the chip to see if the pins you expect to be inputs and outputs actually are.

Finally for these logic gates they usually recommend grounding unused inputs or outputs or both. Make sure you are doing that.

I'm happy to help you try to figure this out, it's good practice.

Thanks again
Cheers

[7imix]

You are welcome!

[Farmhand]

Gated pulses

Well I messed around a while and got sidetracked again I ended up with a gated pulsing setup. I can get this output below from a pair of alternating outputs and from the output the alternating frequency is divided from, which is double the alternating output. So there is two outputs like the one below and a third at twice thier frequency. I'll pulse my toroid with it to see what happens. Should be a lot of bunches of pulses wizzing around in there.

http://9xhe3g.bay.livefilestore.com/...001.JPG?psid=1

Seems like a good way to control power. The wider I make the gating pulses to more pulses are in it. More than one ocsillator could be controlled by one oscillator supplying the gating pulses.

Cheers

[gmeast]

UCC27321 MOSFET Driver

Hi everyone ... anyone,

I'm having a slight problem understanding how I will control my IRF540Z MOSFETS powered by the 12VDC battery using the UCC27321 MOSFET Driver. My controller logic sits on regulated 5VDC rails and the actual logic output swing is from 0.01VDC to 4VDC. The IRF450Z's are not logic level devices.

Does the UCC27321 MOSFET Driver accommodate logic level inputs?
The document alludes to it but ... :

the data sheet says:

"Input voltage (IN), VIN -- 5V to 6V or VDD + 0.3 (whichever is larger)"

and ALSO says:

"(IN) -- Input signal of the driver which has logic compatible threshold and hysteresis."

So ... I'm just NOT an expert at data sheets and I know that many of you are better at that sort of thing than me.

Data Sheet:
http://02d1852.netsolhost.com/radian...g/ucc27321.pdf

I only have a few of the UCC27321 drivers and want to fry as few as possible.

Thanks in advance for any help anyone can offer.

Later

[7imix]

From the "input stage" section

The IN threshold has a 3.3-V logic sensitivity over the full range of Vdd voltages; yet it is equally compatible with 0V to Vdd signals.

That's why it's called a low side driver. 3.3 volts on the input side will drive the output MOSFET all the way to Vdd. But, the input also supports full voltage signals, so no need to worry about frying it.

The logic gates aren't going to provide much current and the output side of this thing supports up to 9 amps, so I think frying it would actually be an amazing accomplishment.

[Farmhand]

Hi Greg, Looking at this diagram, I love diagrams by the way. Less confusing than words.

http://9xfdag.bay.livefilestore.com/...ver.jpg?psid=1

Anyway looks like we just connect the 12 volts to pin 1 and 8 the pulses to pin 2 or however that is done. When a 5 volt pulse hits the gate at pin 2 it switches that mosfet which allows the 12 volts from pin one through the driver to hit the gates and bases of the four output transistors two fet's and two bipolars. They also draw or switch from pin 1 and 8. I think. Thats what the drawing tells me. I would try it but i'm not going to town for two more days. I think thats what I would do. I hope you get some more qualified advice on that though. Haha These thing can throughput some good current.

Hi everyone ... anyone,

I'm having a slight problem understanding how I will control my IRF540Z MOSFETS powered by the 12VDC battery using the UCC27321 MOSFET Driver. My controller logic sits on regulated 5VDC rails and the actual logic output swing is from 0.01VDC to 4VDC. The IRF450Z's are not logic level devices.

Does the UCC27321 MOSFET Driver accommodate logic level inputs?
The document alludes to it but ... :

the data sheet says:

"Input voltage (IN), VIN -- 5V to 6V or VDD + 0.3 (whichever is larger)"

and ALSO says:

"(IN) -- Input signal of the driver which has logic compatible threshold and hysteresis."

So ... I'm just NOT an expert at data sheets and I know that many of you are better at that sort of thing than me.

Data Sheet:
http://02d1852.netsolhost.com/radian...g/ucc27321.pdf

I only have a few of the UCC27321 drivers and want to fry as few as possible.

Thanks in advance for any help anyone can offer.

Later

Cheers

P.S. I see somebody finally rated our thread. Awesome !