Hi Dana,
Board size: It is a guess and shurely can be done if necessary. If you need more space it's OK so you can measure and debug more easyly.
Transistors: I did not build this driver stage myself but it is a known standard circuit. Standard transistors like BC307 or similar with a max. current of 1A / 40V should be ok.
Blocking caps on power lines: If you intend to build it absolute dead failsafe use 10µ+1µ+100n+1n. The smaller caps shall be as close as possible to the power pins. These caps supply sudden currents where wires still bother to start with current supply. I often place the smaller caps (100n, 1n) on the bottom of the board in order to get as short wires as possible to the power pins. The 1µ and 10µ may be placed more distant.
But in most cases a 1µ and 100n will be suffitient and at regulators 10µ and 100n. At opamps 100n only.
I decide by guess only conforming the expected current and steepness of pulses. But never omit a 100n at ICs and 1µF at regulators - minumum requirement!
Sorry there is no undoubtable rule for this as it can be decided ultimately by HF measurements only for every specific setup.
FET driver: Please stand by until I reworked my schematic. I will supply a 3rd suggestion with NE555 as driver as well. This circuit will be the easiest to build. All drivers shall be attached very near to the gate.
rgds John
Board size: It is a guess and shurely can be done if necessary. If you need more space it's OK so you can measure and debug more easyly.
Transistors: I did not build this driver stage myself but it is a known standard circuit. Standard transistors like BC307 or similar with a max. current of 1A / 40V should be ok.
Blocking caps on power lines: If you intend to build it absolute dead failsafe use 10µ+1µ+100n+1n. The smaller caps shall be as close as possible to the power pins. These caps supply sudden currents where wires still bother to start with current supply. I often place the smaller caps (100n, 1n) on the bottom of the board in order to get as short wires as possible to the power pins. The 1µ and 10µ may be placed more distant.
But in most cases a 1µ and 100n will be suffitient and at regulators 10µ and 100n. At opamps 100n only.
I decide by guess only conforming the expected current and steepness of pulses. But never omit a 100n at ICs and 1µF at regulators - minumum requirement!
Sorry there is no undoubtable rule for this as it can be decided ultimately by HF measurements only for every specific setup.
FET driver: Please stand by until I reworked my schematic. I will supply a 3rd suggestion with NE555 as driver as well. This circuit will be the easiest to build. All drivers shall be attached very near to the gate.
rgds John
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