Originally posted by prochiro
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- Now we have a base showing up that less than perfect setups work around 40µs = 40µs heating time for any transiton H->L & L->H.
- At every transisiton we get delivered a chunk of heat into the FET. This heat needs to be drained. At low current and low frequency our drain povided (heat sink) might be OK. And we know that increasing frequency OR / AND frequency will demand more drain.
- Imagine a bucket (heat capacity) with a hole at bottom side (heat sink). Increasing level of fluid in the bucket will increase in some extent drain capacity because of more pressure (temp. difference) at bottom hole. Now we can imagine that at a certain level of fluid flow (heat) inot the bucket will get the bucket to overflow => FET death.
With this imagination in mind everybody can "feel" how FETs feel and take measures dor safe operation.
JohnS
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